Semiconductor production involves many intricate steps and precise handling is required in each step. Wafer substrates may undergo ion implantations, various depositions, etching processes, evaporations, annealing procedures, and other procedures to achieve a complete semiconductor device. Each of the steps include a myriad of parameters to be considered for the best possible production of devices.
Heretofore, gallium arsenide semiconductors have been produced by an assortment of methods. Doped gallium arsenide epitaxial layers have been grown on semi-insulating gallium arsenide substrates, as described in U.S. Pat. No. 3,770,518 issued Nov. 6, 1973 to Rosztoczy et al. Bell Telephone Laboratories has done an extensive amount of research on gallium arsenide structures grown by molecular beam epitaxy as described in U.S. Pat. No. 4,205,329 issued May 27, 1980 to Dingle et al.
The currently used technology of vapor deposition to construct gallium arsenide devices aids in the construction of device components requiring very small dimensions. A gallium arsenide self-aligning gate field effect transistor (SAGFET) can be produced with components having dimensions small enough to exhibit low power and other advantageous attributes. However, the number of limitations resulting from those same small dimensions make device manufacturing very difficult. Reproducibility is effected by details which are now under consideration.
An example of one of those difficulties involves the self-aligned fabrication process required to produce a gallium arsenide semiconductor. The objective is to control the position of the ohmic contact material evaporated for self-alignment while minimizing the shadowing effect of the gate mask. If the gate mask is quite thick, shadowing occurs and causes a difference in the distances between the gate and the first ohmic contact material on one side and the gate and the second ohmic contact material on the other side. The substrate dimensions determine whether or not production tolerances can be met.
The reliability of gallium arsenide devices, especially field effect transistors, is directly related to the integrity of the ohmic contacts on the semiconductor surface. Presently, production methods require high tolerances for shadowing. This presents a reproducibility problem during production due to the non-symmetrical deposition of ohmic contact material. If evaporation is used as the method of depositing the ohmic contact material, the evaporation source is essentially a point, while the wafer substrate is a planar surface. The distance between the evaporation source and the center point of the wafer determines the radius R of the circle. Typically, the deposition equipment used in this procedure is a half dome shape having wafer substrates requiring deposition placed as efficiently as possible against the interior surface. The evaporation path is perpendicular to the wafer substrate at its center point. However, the evaporation path from the source to masked areas at the outerlying edges of the wafer substrate strikes the substrate at an angle. That angle is defined by: (1) the perpendicular path between the evaporation source and the center point of the wafer substrate, (2) the planar surface of the wafer substrate itself, and (3) the hypotenuse of the angular evaporation path between the evaporation source and an off-center masked region on the wafer substrate. Currently, the masks used in self-alignment processes cause non-symmetrical deposition of ohmic contact materials because of this angle of evaporation.
As the wafer substrates get larger, the problem is accentuated for outerlying masked regions because the angle of evaporation increases due to the greater distance from the center of the wafer substrate. For commercial reasons, production techniques must be compatible with the use of larger and larger wafer substrate sizes, while maintaining a sufficiently low tolerance to yield good quality semiconductor devices.
U.S. Pat. No. 4,379,005 issued on Apr. 5, 1983 to Hovel et al discloses an invention which involves the fabrication of semiconductor devices by providing as an intermediate manufacturing structure a substrate of one semiconductor material on which there is a thin epitaxial layer of another semiconductor material. Both materials have a different solubility in a particular metal. A process of fabrication is described in which the properties of the various materials and processes involved operate together to achieve the goals desired in the ultimate structure. Although the Hovel et al invention describes particular advantages with respect to a gallium arsenide substrate, the idea may be used with all substrates.